Apple SoC Verification On-Site Interview

Juniper been1810
Sep 16 34 Comments

Hey guys!

I have an upcoming interview with Apple for their SoC Verification Engineer position.

Can someone who's been through this process give me an overview of what to expect (questions/format/what to emphasize on while preparing/resources to prepare).

I have zero experience with SystemVerilog/UVM. And apart from a few internships, not much tangible work experience.

My strengths are in Verilog/Python/Comp Arch.

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TOP 34 Comments
  • Cisco / Eng
    πŸ‹οΈβ€β™‚οΈ πŸ‘¨β€πŸ’»πŸ’€πŸ”„

    Cisco Eng

    BIO
    I am the tech bro.
    πŸ‹οΈβ€β™‚οΈ πŸ‘¨β€πŸ’»πŸ’€πŸ”„more
    How many leets you done?
    Sep 16 8
  • Apple RQVo51
    Do yourself a favor, go on amazon and buy cracking digital vlsi verification interview. Understand all the question in the book and you’ll do great
    Sep 17 3
    • Juniper been1810
      OP
      Yup! I have this book. It's been incredibly helpful.
      Sep 17
    • Juniper been1810
      OP
      But, not a lot of coding questions on there though.
      Sep 17
    • Intel / Eng soc_rtl
      Any such book for vlsi designers?
      Sep 17
  • Synopsys / R&D gWqv82
    I had this exact interview around this time last year. The questions I was asked were mostly on UVM and verification concepts like active/passive monitors and virtual interfaces, some basic Verilog coding on a white board, and then some algorithm questions like traversing through a 3D matrix, swapping a set of elements and rotating a 2D matrix in place. Most but one interviewer were friendly and helpful during the interviews.
    Sep 17 1
    • Juniper been1810
      OP
      This is helpful. Thank you!
      Sep 20
  • Intel lync
    Which team? Know the basics well..they test on that ground
    Sep 17 6
    • Intel lync
      Depends on the team..if its cpu they will ask more of comp arch..if its wireless , more on verilog ans SV
      Sep 17
    • Juniper been1810
      OP
      The JD says "SoC Verification" and doesn't really state what the team is.
      Sep 17
    • Intel lync
      U can always check with the recruiter :)
      Sep 17
    • Intel lync
      Blocking/non blocking is everyones fav. Polymorphism, UVM basics and some perl if u used it
      Sep 19
    • Juniper been1810
      OP
      Don't have too much experience with UVM/SV, so they'll probably counter that with some tough coding questions.
      Sep 19
  • Intel gtfo?
    Do update on how your interview goes!
    All the best!!
    Sep 17 1
    • Juniper been1810
      OP
      Thanks! I will update once in done with the interview!
      Sep 18
  • Intel / Design ghari3467
    Which site?
    Sep 17 1
  • Synopsys osnn6
    Have you stayed more than 6 years in your current company?
    Sep 17 3
    • Juniper been1810
      OP
      Nope. I'm just an intern.
      Sep 17
    • Intel yedechale
      Why does it matter if it’s more than 6 years?
      Sep 17
    • Synopsys osnn6
      The final approval looks for such criteria and there may be rejection without reason given. However, in your case there should not be a problem as you are intern.
      Sep 18
  • TI GLVW76
    There are some good UVM tutorials on YouTube. Look for the ones published by Mentor, Cadence, or book authors.
    Sep 18 1
  • Juniper been1810
    OP
    Also. I've heard that you need to get a positive feedback from all 6 interviews to get an offer. Is this true?
    Sep 20 0
  • Juniper been1810
    OP
    Quick Update: It's with the SEG group. I didn't know this before πŸ˜…
    Sep 18 0