What exactly some one expect if JD ask for good IP knowledge in some PHY (e.g. USB, PCIe)
Thanks for the information. I am having 3 years of post silicon validation of usb phy but my tasks were more related to automation stuff. I want to study and learn about it. What is the right resource within intel and outside intel?
For a PCIe interview role at apple, during the interview I was asked about my understanding of using PCIe analyzer, tracing issues in the enumeration, bridge, root ports and enumeration process. For PCIe and USB 3.0, I would recommend books/trainings from Mindshare. Hope this helps!
Thank for the information. How is mindshare trainings? Have you attended any?
Serial and parallel protocols, reasoning for choosing one over another, training, bandwidth understadning,
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Depends on the role. Design vs Verif vs PD, but generally these: specific protocol knowledge, Link training, SERDES, mixed signal interaction, behavioral modeling. Obviously, these are vast topics and it depends on your YOE too. I have seen PHY teams hire people with none of these experiences.