What are some common HW interview questions?

Dell FYfDax
May 30 32 Comments

Thought it would be nice to share some common interview questions in HW with answers if possible. Which companies have the hardest and easiest interview process in the industry?

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TOP 32 Comments
  • Nvidia wooh!
    What is a virtual function 😂😂 . Probably every company I have interviewed with has asked this.
    May 30 1
    • Intel Emu01
      And pure virtual function 😂
      May 30
  • Nvidia / Eng Mr.XoXo
    Any backend VLSI position.
    Setup Time
    Hold Time
    recovery time
    removal time
    dynamic and static timing analysis
    statistical static timing analysis and deterministic STA
    slacks,jitters and skews
    PVT variations
    On chip variation AOCV, POCV
    Path based approximation and Graph based approximation
    clock borrowing and multi cycle paths
    clock domain crossing and techniques
    clock gating and clock uncertainity
    CRPR
    PVT/RC corner and Parasitics
    crosstalk, agressor-victim effects, signal integrity
    ETM/QTM/ILM.dbs
    SDF files and how to interpret them
    Noise margins
    May 30 2
    • Nvidia zodf
      This sounds more for PD
      May 30
    • Nvidia / Eng Mr.XoXo
      "Timing" to be specific.
      May 30
  • Microsoft YsTJ07
    How would you design a human mind? Was asked this at SpaceX
    May 30 3
    • Oracle ktHX86
      What would be the answer of this?
      May 30
    • Google / Mgmt
      Ex Amazon

      Google Mgmt

      PRE
      Amazon
      Ex Amazonmore
      Find suitable mate(s). Procreate and cultivate each outcome until design parameters are met.
      May 30
    • Google / Mgmt
      Ex Amazon

      Google Mgmt

      PRE
      Amazon
      Ex Amazonmore
      Or simply say. Fuck. Final answer.
      May 30
  • Flagged by the community.

    • Intel / Eng RTL_
      This looks good. Thank you!
      May 30
  • Qualcomm qatq
    For verification roles:Object Oriented and polymorphism, abstractions, inheritance.
    Planning test bench , listing it's components and main point of interests.
    Scripts and high level programming skills, logic riddles.
    System level understanding of previous things you did.
    Familiarity with assertions and coverage.
    May 30 0
  • Apple / Eng fruitco334
    For camera:
    -describe the path of light from entering the lens to an image being rendered on screen
    -how does a CMOS work?
    -describe the functionality of the major imaging algorithms (AWB AE AF etc)
    -what hardware factors chiefly influence image quality?

    Etc
    May 30 0
  • Intel yabadabadu
    For RTL design engineers( pretty basic phone interview questions)
    - Async fifo design
    - State Machine questions
    - Setup and Hold Knowledge
    May 30 0
  • Intel VINTC
    Can any one suggest questions on power verification? (Both pre silicon and post silicon)
    May 30 3
    • Qualcomm qatq
      What are interesting scenarios wrt power (nominal,max, recovery from various transitions)
      May 30
    • Mentor Graphics
      poly..

      Mentor Graphics

      PRE
      Mentor Graphics, Palo Alto Networks
      poly..more
      Haven't given a power specific interview yet but I wonder if they ask about upf related questions I.e. power dpmains, isolation,retention, clamping, different techniques to reduce power consumption(low voltage, adaptive voltage, clock gating etc), level-shifters, upf commands
      May 30
    • Intel / Eng RTL_
      How level shifter work? Or power switch.
      May 30
  • Intel / Eng Chipzilla
    General high level stuff..

    STA , CDC. CMOS basics, Digital Design, ASIC & FPGA design flow, Synthesis and PnR constraints, RTL debugging, netlist generation & simulation, board level debug, Low power techniques, Design for X, DFT, State Mcs, Scripting, HDL, HVL, Computer Architecture, UVM/OVM, ON CHIP and OFF CHIP protocols (AHB, AXI, CHI,...) (PCIe, DDR, Ethernet, CAN), PCB design related, SI related , Version control, sometimes AGILE and 6 sigma...

    Each of above topics has multiple sub topics... need to know basics of it all.. and then specialize in few things from above...
    May 30 3
    • Xilinx LWkj71
      Dude. That's not helpful at all. Each of this is a PhD or a career separately.
      May 30
    • Nvidia bdei51
      For SVP of hardware position?
      May 30
    • Intel / Eng Chipzilla
      I have done basic level prep for most of these topics. Except AGILE, 6 sigma , PCB & protocols, DFx and DFT.

      Once you prep basics... a lot of this is easy. But ONLY if you have prepared for it or studied it well at some point of time.

      If you have not done that.. or forgotten.. then it is difficult.

      The confidence if you know your basics is awesome.
      May 30
  • Intel Emu01
    CDC, Sequence detector FSM, Blocking non-blocking assignment difference, fork-join
    May 30 1
    • Intel Emu01
      Leetcode buy/sell stock, array, bit swapping, strstr
      May 30
  • Intel / Eng Chipzilla
    Generally.. you need a processor + high speed comm protocol + memory interface.

    So if you pick two of the three..it increases your chances
    May 30 0
  • Mentor Graphics
    poly..

    Mentor Graphics

    PRE
    Mentor Graphics, Palo Alto Networks
    poly..more
    regular expressions
    pipelined uvm driver
    controlling end of run phase
    May 30 2
    • Intel / Eng RTL_
      What does controlling end of run phase mean?
      May 30
    • Qualcomm qatq
      Watchdog timeout , objections , killing all threads
      May 30
  • Google Methane
    Reverse a linked list
    May 30 1
    • Intel / Eng RTL_
      👎🏿
      May 30
  • Xilinx LWkj71
    Priority encoder
    Fsm state machine questions of detecting a pattern like 1101
    One hot encoding for FIFO
    Gray coding.
    May 30 0
  • Ring / Eng aXrq35
    What's FIB.
    May 30 0