what did they ask you write hdls to solve?
Why do Airbnb need verilog coding .? Whatever be the position you are applying (backend design, front end/RTL design, DV, CAD), there will be a minimum of one round where you need to code in verilog. Strictly speaking no one ask you in vhdl, they ask you in verilog. You can do it in SV. I remember writing the code in VHDL, my school taught us VHDL and I’m comfortable in VHDL at that time, they laughed at me for coding in VHDL. At Apple, every round in onsite there is heavy white board coding. Apple interview process is the best (for hardware).
Yes. Asked async FIFO in Verilog
Arbiter design in verilog
Async fifo, sequence detector,clock divider in verilog
Sequence detector state diagram and then State machine in verilog
FSMs and something to do with counters and atomicity.
Why are you asking? Airbnb has hardware positions 🤣? To answer your question, yes they generally do. For a DV position mainly a sequence detector type thingy and for design positions, probably many more such problems.