Respectful Co-Workers Generous Sick Leaves Decent Vacation Policy Good Culture
Not so great Work Life Balance Pay is not even up to the industry lower standard
Anybody recently interviewed with Xilinx. Do they ever update their Taleo portal after onsite interview? @Xilinx
Amd xilinx interview I am in process of interview, where my first technical round with smts is over. It was a positive But now they are going for next round with amd fellow and director. What shall I expect from them? Yoe 4 but they are looking for leaders
I have a phone interview with Xilinx and any help pointers for the FPGA Design interview is really appreciated
Had a phone screen interview with a Xilinx recruiter 3 weeks ago, and it went pretty well. We just had a brief conversation about the job details, salary range, and my work experiences based on my resume. The recruiter said I will be getting a call from a hiring manager within few days. But there's ...Read more
I have a interview for a system software engineer at xilinx and wanted to know what questions I can expect. Location: San Jose #tech #xilinx
I have an interview with Xilinx for position Staff design engineer position. This is my first interview in staff level. Any inputs and pointers on topics i need to cover for front end design . Thank you in advance #interview #hardware #semiconductor
I’m graduating soon and I have an interview call for the role of an SDE at Xilinx AECG. Was wondering what is generally expected of a candidate here. I’m a computer engineering grad student and I’ve primarily focused on Digital design in my coursework. #hardware #semiconductor #amd #xilinx
I have interview scheduled for systems design engineer @ Xilinx. I would like to know how does the hiring process go ? Do all the people in the panel should give a yes ?
Folks - in mid of interviews for Xilinx PMTS. Is Xilinx freeze coming soon or already in plan? #hardware #interview #semiconductor #amd #xilinx
Hi, I recently interviewed with Xilinx and recruiter informed that he got a positive feedback from the team and wants to move forward in the hiring process. I'm expecting an offer soon. Can someone from @Xilinx tell me the grade level and compensation that I can expect? YOE: 8 #interview #hardwa...Read more
Any tips on how to prepare? #interview #sta #xilinx #interview #hardware
I'm a masters student with 9 months of internship experience. I'm currently interviewing at Xilinx, and I was wondering what's the expected TC for a system design engineer new graduate at Xilinx? I saw some salaries on levels.fyi, but the values vary drastically. TC: 0 #xilinx #amd
Hi everyone, I got an offer from xilinx and I am planning to join, I am a bit concerned about the amd acquisition. Is there a chance that there would be layoffs after the acquisition is finalized? I would be joining as a Software Engineer!! #semiconductor #hardware #interview #amd #xilinx #nvidia...Read more
Same base and bonus. 10% increase in RSU.. Current TC:250+ New TC: 275+ #hardware #interview #semiconductor #intel #synopsys #synopsysinc #amd #xilinx #intelcareers
Hi, What is the salary expectation for a senior software engineer position at AMD/Xilinx in the Bay Area, CA. I finished the interview and wanted to know what to ask for as expected compensation. TC: 164k Yoe 2 #engineering #software #swe @amd @xilinx
I will get offer from AMD, San Jose and I found the team was from Xinlinx. It was different between AMD and Xilinx team?(Salary or Wlb) And do you know expected base or TC for MTS? TC:170 #interview #hardware #semiconductor
I'm interviewing for a positing at Xilinx and was wondering if anyone has some information on them. Pay? Culture? Outlook?
I am expecting an offer from Xilinx, San Jose. What would be compensation that I can expect? YOE: 4.5 years #interview #semiconductor
Anyone who has interviewed with Xilinx for an Field Application Engineer role? Any help would be appreciated
I am expecting a Xilinx offer for the Sr. Staff / PE Board test engineer role in Bay Area. What TC I should be asking for? Thanks #semiconductor #interview #hardware Current level: sr. PDE engineer Current TC: 135+20k+20k (non bay ) YOE:15 Xilinx offer:~270k/year (San Jose) Base:190k + 15% + 20...Read more