Hi, I have an interview scheduled with Nvidia for the position of ASIC Design Intern. What kind of questions can I expect as a grad student applying for this position with prior work experience in Arm?
Also, can anyone suggest resources to cover SystemVerilog/Verilog, architecture?
What is the coding level required for this role?
TC: NA
YOE: 3 before Masters
#nvidia #asic #internship
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comments
Static/Dynamic/crowbar circuit.
Inverter characteristics.
PMOS-NMOS Sizing.
On RTL front,
XOR functionality using 2x1 mux.
Write rtl to create latch/ff.
For SV - Assertions.
Regarding Comp Architecture ,
Loop unrolling, virtual memory, gpu-cpu diff.
Clocking Architecture. Routing. Setup-Hold issues.
Try to cover all this. Should help.
I don’t think anything with verification is required for this role.