Apple verification entineer interview #apple #verification #HWverification
hello folks ! I have a one hour in person screen lines up Apple in SEG in a coupke of weeks . Title is SOC desing veeification engineer . Can you guys please guide me with the areas verification engi eers are tested for ? I did look up glassdoor but there isnt much ysefuk info there . Appreciate any inputs!!
How was the interview?
Interview was good , lots of questions on what I worked on which I answered well . He did ask few questions on advanced UVM that I completely had no clue on . I had busted my ass trying to read up assertions and constraints but they were blissfully ignored
What were the advanced UVM questions asked? Would be good to discuss solutions here.
Yes, interested. after 3 years lol
Hey!! Following up. Did you get an onsite call?
Cracking VLSI Verification Interview book on Kindle/Amazon, by Ramdas & Garg. Its a good starting point for preparation. Also refer cookbooks from verificationacademy.com. Find more interview questions on chipverify.com and stackoverflow (language:systemverilog, sort by number of views/popularity)
Thank you !!