Meta seems to be hiring these days in ASIC Architecture, Design, DV. What kind of TC do they offer at different levels? Please don’t guess. TC : 230K + paper money #hardware #semiconductor
Hire to Fire
Want to know if it’s worth the effort. It takes a lot of time to prep and go through the process.
I see 5 YOE SWE getting 500K at Meta. I bet E6 ASIC engineers require around 15 YOE. Kinda sad they are not being offered at least 700K to 800K, and E7s at least $1M
E5: 350k-400k E6: 450k-500k E7: 650k+ These are the typical ranges, top of the band offers can be slightly higher but need stellar interview performance and competing offers. It is very hard to get E7 as an external hire.
Thanks for the data point. Are these numbers for Bay Area or Austin? These do look like Austin, or low band salaries.
Bay area and not low band at all. Don't compare with what SWEs get at Meta. E5 top of the band is around 400k, E6 top of the band is around 550k.
E5 is typically how many yoe?
Is Apple ict4 comparable to E5 ?
Not worth it
Given the poll results, the top of the range is definitely 100K less than my expectations. But what’s your reason for saying this?
Asic is not their bread and butter. Interviews are so cringe. And your interview must be perfect. Give a try and then let us know how you feel.
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Didn’t they just lay off this org?
It’s RL only, not infra. These ASIC openings are in infra org.