DM for referral. Details of open position Principal Design Engineer Job ID: R34194 Location : Noida Experience level: 8+ years Education: BE / Btech/ ME/ M Tech / MS • Strong Static Timing Analysis skill • Understand logic synthesis, sta analysis, logic equivalence check, familiar with EDA tool usage for synthesis/sta analysis/lec check flow • Basic knowledge about digital logic design and HDL language Knowledge, like verilog or vhdl is necessary • Excellent analytical and problem-solving skills. Quick learner-able to learn and apply technical and complex topics Sr Principal Design Engineer Job ID: R34104 Location : Bangalore Experience level: 12+ years Education: BE / Btech/ ME/ M Tech / MS • Strong background in functional verification fundamentals, verification environment planning & development, test plan generation is a must • Prior Digital verification experience in some of the serial bus multiprotocol PHY IP’s ( SerDes IP especially PCI and other protocols) • Strong expertise in Verilog, HVL( SV, e) with UVM/OVM/eRM methodology • Strong RTL and GLS debug skills Sr Principal Application Engineer Job ID: R32847 Location: Bangalore Experience Level: 12+ yrs Education: ME/ M Tech / MS • Strong and In-depth hands on Physical Design Domain/STA/Synthesis. • Expertise in one of the Industry Standard Physical Design tool – Innovus, Genus. Tempus ,EDI, ICC2, Olympus • Good & Hands On expertise in STA, Prime Time, Tempus, ETS • Strong fundamentals in Timing / timing closure. Principal Application Engineer Job ID: R33096 Location: Bangalore Experience Level: 8+ yrs Education: ME/ M Tech / MS • Strong and In-depth hands on Physical Design Domain/STA/Synthesis. • Expertise in one of the Industry Standard Physical Design tool – Innovus, Genus. Tempus ,EDI, ICC2, Olympus • Good & Hands On expertise in STA, Prime Time, Tempus, ETS • Strong fundamentals in Timing / timing closure. Solutions Architect Job ID: R32287 Location: Bangalore Experience Level: 16+ yrs Education: BE / Btech/ ME/ M Tech / MS • Strong knowledge of simulation and verification tools, with proven expertise in processor based emulation systems • debug designs, with debug in processor based emulation / acceleration platforms • direct experience in simulation acceleration methodologies. • Virtual acceleration technology and Hybrid platforms experience for IP/SoC environments • FPGA prototyping and SW bring-up is big