I am expecting a Xilinx offer for the Sr. Staff / PE Board test engineer role in Bay Area. What TC I should be asking for? Thanks #semiconductor #interview #hardware Current level: sr. PDE engineer Current TC: 135+20k+20k (non bay ) YOE:15 Xilinx offer:~270k/year (San Jose) Base:190k + 15% + 200k rsu
Join asap, their merge with AMD may get approved by end of this month and the stock will go up.