I have onsite apple interview for design Verification role. I have 3 years experience. What topics or subjects should I expect. I studied SV and UVM so far. Some verilog
Which team? SV and UVM should do the job. You are going to need C++ as well. But Apples interviews are very team dependent. No 2 interviews are the same. I have found the questions mentioned on Glassdoor to be pretty useful. Also the book “cracking digital vlsi verification interview” covers a lot of questions. DM me for more info.
For me, they had asked about my experience, the best work I had done etc etc One round was testing cpp skills One was with the director who gave me design problems. Her favorite one was come up with a timing diagram at various points in the given design OVM and testbench environment questions One round was testing verif skills, they explained some designs and asked me how will you verify it and what would be the corner cases
@intc123, which team did you interview with?
How do I make a switch to front end if I don’t have enough experience? I do PD mainly
It heavily depends on the group. As for my own experience with Apple, it’s always been the wrong job mainly due to poor resume screening by their recruiters. Plus they use the term “verification” very loosely. Everything is verification for them: timing analysis, CDC, power analysis... Heck, one time the HM called me and was mad at me why I applied for a power verification job where they analyze the toggling of the bits. He said all this SV/UVM on your resume is unrelated to this job and why didn’t you read the job description. To which I replied: I didn’t apply for the job, your HR recruiter contacted me on LibkedIn and said he had a great verification opportunity for me and he never provided me a job description, otherwise I myself would’ve screened me out. Then he went on bashing their own HR recruiter 🤣 Anyway, if you want a real SV/UVM job at Apple, you should target their Austin site.
I have confirmed with the manager during screening interview that they use SV and UVM