Hi all, I have a phone interview for a Design Verification role coming up. What topics/questions can I expect? Thanks!! YOE: 12 TC: 210K
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Generally for a DV position, you'll get questions about UVM, C++, scripting, methodology, as well as some logic puzzles to think through. Some teams use hackerrank for coding interviews, but if this is a first phone interview it's going to be a description of what the team is looking for and your interests along with some technical questions. We're hiring, but need to ensure that it's a good fit for both sides.
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Custom SOC. I prepared general UVM, System Verilog and constraints related questions. Was wondering if they will dive into anything specific or if I missed anything else.
OP how was your interview? I have one lined up so asking